Package Design Engineer

Date posted - Sep 16, 2024

JOB DESCRIPTION

Broadcom is seeking an experienced package design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and very-high-power delivery needs. You will be part of a worldwide R&D team developing high-performance package designs for ASICs for artificial intelligence (AI), networking, high-performance computing (HPC), and 5G base stations. These designs include SerDes at 224G and higher, 5G RF/Microwave ADC/DAC, HBM, DDR5 and more. You will have the opportunity to collaborate with the team to create the package structures needed to enable new design, and contribute to efficiency improvements for our design team.

QUALIFICATIONS

  • Overall design responsibility for ASIC package designs, including aspects of signal integrity, power integrity, manufacturability, reliability, and thermal, in partnership with our experienced team of package engineering experts.

  • 1 or more years experience with Cadence SKILL for Allegro, or similar design-automation coding experience and interest (3 or more years is preferred)

  • Package Design of critical structures for SerDes, ADC/DAC, DDR, etc.

  • Schedule, prioritize, & track your work across 2+ projects simultaneously

  • General flip-chip BGA package design & engineering

  • Project management and customer interface for your design projects

  • Contribute to efficiency improvements for the design

Back To Job Postings